Leakage Power Reduction through Hybrid Multi-Threshold CMOS Stack Technique. International Journal of Engineering & Extended Technologies Research (IJEETR), [S. l.], v. 8, n. 2, p. 3059–3066, 2026. DOI: 10.15662/IJEETR.2026.0802305. Disponível em: https://ijeetr.com/index.php/ijeetr/article/view/727. Acesso em: 25 apr. 2026.